RESEARCH AND DEVELOPMENT
1. Pico Satellite
This project is about development of Small-satellite in Academic environment. Main objective of this project is to familiarize and excite students in the area of satellite technology. The project is to be carried out in two phases. The phase one of the innovative satellite project initiated by PES Institute of Technology and other collaborative colleges like Sona college of Technology, SKR Engineering College and Veltech University has planned to build a Low cost spin stablised Imaging satellite. This project enables us to test various algorithms and concept involved in the satellite technology. The first phase of the satellite project is in progress and is expected to be completed within a year span and budget estimation is around 25 lakh. Second phase of the innovative satellite project is a Low cost 3-Axis Stabilized Imaging satellite. The second phase of the satellite project is carried out simultaneously. This interim report gives a structure of our study and design of different subsystems of phase one project with system configuration.
Last from Right, Dr.Kalpalatha Reddy. Dean - Research and Development - SKR Engineering College during the Satellite Meeting held at PESIT, Bangalore
Mission Objective:
The proposed satellite is a Small-satellite with the purpose of capturing images of Earth and transmitting it to the Ground. The Payload is a CMOS camera of 3MP, 80m ground resolution and with on-board compression. The satellite is a cuboidal shaped structure with dimensions of 185x180x125mm and a mass of approx 3Kg. It is spin stabilized with a spin rate of 4+/- 0.5 rpm and spin axis oriented towards positive orbit normal within a specification of +/- 3 deg. Attitude Determination is done using the Magnetometer data and sun sensor data. Tracking of the satellite will be done using One Way Doppler. It uses S band for communication with the Ground Station. The BMU consists of an AVR32 Controller supported by an Actel FPGA. Thermal control is provided by 5 temperature sensors and 3 heaters. The Electrical power system is designed with 20 solar panels with 29.5 percent efficiency, average output power upto 1.68W per cell, and two storage batteries of capacity 1300mAh with a Power management unit. TTC scheme is as per CCSDS BCH coding 63.56 and Turbo- Coding at the rate of ½.
2. Centre of Relevance and Excellence
Research laboratories
RF Id and sensors laboratory
Advanced VLSI and Embedded computing Laboratory
Image and Signal Processing Laboratory
Laboratory details
The RFID and sensors lab consists of the following hardware and software
RFID details:
Rfid Name: YHY502CG
Frequency: 13.56 MHZ
Interface TTL RS232
Baudrate: 19200bps
Contactless communication up to 106 KHZ
Operating Voltage: DC 3.0-5.5
Watchdog timer
Size: 40mmx25mmx6mm
Typical Operating Distance: 0-60mm
Auto checks for presence of tag
Purchasing Cost: 3000 rs
Status: On going
Sensor Details:
IR Sensor: (Infra Red)
Distance: 15 cm
Operating Voltage: 5v DC
IR Length: 5mm
PIR Sensor: (Human Sensor)
Distance: 5cm
Operating Voltage: 12 DC
Proximity Sensor: (Metal Sensor)
Operating Voltage: 12 v DC
RFID BASED LIBRARY MANAGEMENT SYSTEM
Objective:
To understand the various controllers and Processors Architecture and working principles. Using interface, Embedded System reduce the man power and making continuous monitoring in real time applications
Safety railway system in rural area
Student member: Thamizhaventhan
Faculty member: Mr. Ramesh
Remote data acquisition and measuring environmental parameters using FPGA and LABVIEW
Student member: K. Sowmya
Faculty member: Mr. Suresh
Advanced VLSI and Embedded Computing Laboratory
Objectives:
To save the chip area by minimizing the interconnect fabrics and to increase circuit efficiency in terms of complexity of circuit, power consumption, and frequency response. To standardized the tasks by using the tools like Xilink, altera, tanner, Mentor graphics etc,
Lab facilities:
The Advanced VLSI and embedded computing laboratory consist the following facilities to do simulation and to implement the prototype
Software available:
Xilink 9.2, Model sim, Tanner 15.0, Keil, Lab VIEW, Mentor graphics
Hardware available:
Xilink& Altera, VTU board, FPGA board, Real time interfacing board
Faculty members involved:
Mr.B. Ramesh, Lecturer
Mr. C.Sridar, lecturer
Mr. S. Suresh Kumar
Mr. S. Prakash
Project details:
VLSI implementation of an edge – oriented image scaling processor
Student’s members:
S. Abinaya saraswathi
Hindu
Faculty member:
C. Sridar
FPGA implementation of synchronization method based on OFDM system for IEEE 802.11a
Students member: Arthi
Faculty member: Kirupadevi
Mr. Prakash
Design and FPGA implementation of DM transmission
Student member: V. Jayalakshmi
Faculty member: Mr. Sivaperumal
Implementation of fault diagnosis and fault correction in combinational circuit and its power reduction
Student member: M. Arthy
Faculty member: Mr. sridar
VLSI implementation of variable block size fast motion estimation algorithm for 1.1.256/AVC
Student member: K. Dhanalakshmi
Faculty member: Ms. Premalatha
Delay and noise analysis in CMOS VLSI circuits
Student member: D. Vinotha
Faculty member: Ms. Chitra
VLSI implementation of low cost high through put LDPC decoder
Student member: V. Nagaragan
Faculty member: Ms.Chitra
Image and signal Processing Laboratory
Objective:
To extend the capability of computing, analyzing, enhancing, restoring, and detecting images. MATLAB Software supports a wide range of image processing operations for various applications in Bio- medical Engineering Design, Graphical Simulation, Communication and provides efficient code generation
Lab Facilities:
Image and Signal processing Lab consisting the following lab facilities to do simulation and to prototype
Hardware Available:
ADSP 2181 Starter kit with user manuals, CD and serial port analog input and o/p cables.
ADSP 2181 Evaluation Kit.
TMS 320c 5416 DSP Kit with user CD and serial port analog input and o/p cables.
IBM PC interface , with necessary installation Software model IBR- I
DSP Based S/M Design Model DSPAt-I
Image Processing Daughter Card
TMS 320c 6713 with Necessary add on cards
Software Available:
MATLAB, MATLAB - Simulink( 2009A).
Lab view Software.
Faculty Members:
Dr. T.Kalpalatha Reddy, DEAN R&D
Mrs. T.Muthukumari , Asst. Professor
Mrs. Premalatha , Lecturer
Mr. Siva kumar, Lecturer
Projects:
Image Communication over Multipath Channel Using Compressive Sensing.
Faulty member : Mrs. Premalatha
Speech recognition system using TMS 320 C6713 DSP
Student member: A.Mathivathani
Faculty member: Mr. K.Sivakumar
Image based currency coin classification systems
Student member: . Maheswari
Faculty member: Ms. Premalatha
Real time acoustic camera using FPGA
Student member: A. Shahul Hameed
Faculty member: Ms. Bhagyalakshmi